Western Digital (WD) has begun manufacturing the third generation of its 3D NAND flash chips, which increases the number of layers from 48 to 64 and will allow it to double capacity.
Pilot production of the new 64-layer chips has already started in WD’s Yokkaichi, Japan joint venture fabrication plant; initial shipments are expected in the fourth quarter of this year with “meaningful commercial volumes” beginning in the first half of 2017.
In 2015, SanDisk and its technology partner Toshibaannounced it was manufacturing the world’s first 48-layer 3D NAND product using BiCS (Bit-Cost Scalable NAND) technology. That BiCS NAND flash chip offered 256Gbit (32GB) of capacity and stored 3-bit-per-cell (transistor). The latest iteration of the technology is called BiCS3.
According to Toshiba, the new 64-layer chips have 40% more potential capacity over the previous BiCS2 technology.
In March, SanDisk shareholders approved a $19 billion buyout by Western Digital.
BiCS3, which is still jointly being developed with manufacturing partner Toshiba, will be initially deployed in 256Gbit capacities. But it will be available in a range of capacities up to half a terabit on a single chip.
Unlike 2D or planar NAND, which consists of a flat layer of NAND flash cells, 3D NAND stacks the cells vertically like a skyscraper.
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