November 27, 2020

lowRISC aims to create a “fully open” SoC and dev board

In an attempt to build a fully open computer ecosystem, University of Cambridge has formed “lowRISC”, a group dedicated to designing hardware using the BSD Open Source License. Their first project – the RISC-V – was announced this week, and it’s pretty interesting.

riscv_prototype_chip-718x479

The RISC-V is a 64 bit ISA that is having a 40nm FPGA version built currently, with a 28nm test chip coming next year. Early versions will run at 500-1000 MHz, and will eventually reach up to 1.5 GHz. Since they are open source, anyone can build one for any use they see fit, be it for research or end-user products, or anything else.

One early version, dubbed the “RISC-V Rocket” is compared to an ARM Cortex A5 at Linux Gizmos, and it looks really good already. It performs about the same at similar clock speeds, but half the size and twice as energy efficient.

With the ability for anyone to create hardware around this architecture without having to rely on patented technology is just another early sign of changing times. Smaller projects will be able to use them, instead of being shut out by licensing fees they can’t afford.

For more information, check out RISC-V.org. It includes a RISC-V simulator that you can check out from your browser.

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